Research
Radiation Effects on Semiconductor Devices
Total Ionizing Dose Effects in FinFETs
FinFETs are placed to be the workhorse of the industry for the coming few generations and thus in a few years, military and space technologies would adopt the use of these devices for the most advanced circuits and systems. The main total dose degradation mechanism of the SOI FinFETs is the creation of positively charged holes trapped in the buried oxide. These radiation-induced traps influence a parasitic transistor, located at the BOX of the SOI devices. For the SOI FinFETs , only damage related to radiation-induced charges at the buried oxide was found, affecting the back inversion channel. In contrast, for bulk FinFETs, the charge trapped in the shallow trench isolation offers a parasitic sub-surface leakage path below the active fin. This affects the dependence of the radiation hardness on the fin width: radiation tolerance decreases with decreasing fin width.
Single-event Effects in Dual and Triple-well SRAMs
NMOS transistors in a triple-well usually collect more charge during a single event strike than those in a dual-well due to charge confinement within the well. For high LET values, however, charge collection at more than one node in a triple-well technology may restore the original state of the SRAM cells in the vicinity of the strike. Thus, for high-LET particles, the triple-well SRAMs do not always upset. We describe this phenomenon as SINGLE-EVENT UPSET REVERSAL. This phenomenon decreases the soft-error rate in certain circumstances, particularly those dominated by ions with high LET values. Dual-well nMOS transistors collect less charge for low LET strikes and thus typically have a lower error rate for environments in which low LET particles dominate.
Impact of Technology Scaling on SRAM Soft Error Rates
Soft error rates for triple-well and dual-well SRAM circuits over the past few technology generations have shown an apparently inconsistent behavior. This work compares the heavy-ion induced upset cross-section in 28 nm, 40 nm, and 65 nm dual- and triple-well SRAMs over a wide range of particle LETs. Similar experiments on identical layouts for all these technologies along with 3D TCAD simulations are used to identify the dominant mechanisms for single-event upsets. Results demonstrate that the well-engineering strongly influence the single-event response of triple-well SRAMs. Layout also plays an important role and the combined effects of well-engineering and layout determine the soft-error sensitivity of SRAMs fabricated in advanced technology nodes.
Radiation Response of Backside-Illuminated CMOS Image Sensors
CMOS Image Sensors (CIS) are good candidates in demanding applications, such as medical imaging, particle detection, and space remote sensing. However, conventional Front-Side Illuminated (FSI) CIS-based imagers do not always satisfy the requirements for high quality imaging, such as sensitivity, modulation transfer function, leakage current and noise. Backside-illuminated (BSI) CMOS imagers have higher quantum efficiency and fill-factor compared to front-side illuminated image sensors. In this work, gamma, proton and heavy-ion irradiation results on BSI imagers have been reported. Gamma and proton doses lead to a significant increase in dark current in the devices because of creation of traps in the devices. Simulations show that heavy-ion irradiation produces single event induced dark current which affects image integrity. The presence of traps influence the charge collected by the imagers. Trench isolation is a viable mitigation technique where the dark current is confined within a single pixel.
Reliability of III-V Devices
Lateral Charge Transport in the Carbon-doped Buffer in AlGaN/GaN-on-Si HEMTs
Dynamic RON and ramped substrate bias measurements are used to demonstrate size and geometry dependent dispersion in power transistors. This is due to a novel lateral transport mechanism in the semi-insulating carbon-doped GaN buffer in AlGaN/GaN HEMTs. We propose that the vertical field generates a 2D hole gas at the bottom of the GaN:C layer, with hole flow extending outside the isolated area. The device-to-device variation is due to a combination of widely spaced preferential leakage paths through the structure and lateral transport from those paths to trapping sites. The spread of the 2DHG outside the active area of the device strongly affects the result of substrate ramp measurements producing major differences between single and multi-finger devices. In dynamic RON recovery measurements, single-finger devices show large device-to-device variation, with multi-finger devices showing a small variation with the transient comprising the superposition of the recovery transient of multiple small single-finger devices.
Impact of Buffer Charge on the Reliability of Carbon Doped AlGaN/GaN-on-Si HEMTs
Charge trapping and transport in the carbon doped GaN buffer of an AlGaN/GaN-on-Si high electron mobility transistor (HEMT) have been investigated. Back-gating and dynamic RON experiments show that a high vertical leakage current results in significant long-term negative charge trapping in the buffer leading to current collapse under standard device operating conditions. Controlling current-collapse requires control of not only the layer structures and its doping, but also the precise balance of leakage in each layer.
